Satellite Events

2026 Silicon Nanoelectronics Workshop (Day 1)
(Tapa 3)

Separate registration required. 
Please visit: https://snw2026.conf.nycu.edu.tw/registration/ to register and for more information.

2026 Silicon Nanoelectronics Workshop Poster Session
(Palace Lounge)

Separate registration required: 
Please visit: https://snw2026.conf.nycu.edu.tw/registration/ to register and more information.

2026 Silicon Nanoelectronics Workshop (Day 2)
(Tapa 3)

Separate registration required. 
Please visit: https://snw2026.conf.nycu.edu.tw/registration/ to register and for more information.

2026 Spintronics Workshop on LSI
(Tapa 3)

Workshop is free, but separate registration required. Register here.

The 2026 Spintronics Workshop on LSI will be held as a satellite workshop of the 2026 VLSI Symposium on VLSI Technology and Circuits. This workshop will highlight emerging spintronics technologies for LSI applications, with a focus on achieving high performance and ultra-low power operation. Invited speakers will present the latest developments, future prospects, and key challenges in this rapidly evolving field.

Please visit: http://www.cies.tohoku.ac.jp/2026_Spintronics_WS/ for more information.

IEEE SSCS Women in Circuits (WIC) and Women in EDS Networking Luncheon

Separate registration required. 
Tuesday, June 16  •  12 PM – 2 PM
Location: Lehua Suite in Kahili Tower

Join the IEEE Solid‑State Circuits Society Women in Circuits (WiC) and Women in EDS for a networking luncheon open to all VLSI attendees.

The event will feature brief, thought‑provoking remarks from SSCS and EDS representatives, followed by informal discussion and networking. Designed for attendees at all career stages, this session offers a relaxed setting to exchange perspectives on technical careers, leadership, and experiences beyond the classroom. Enjoy lunch, connect with peers across academia and industry, and continue the conversation sparked by the conference.

Space is limited, and early registration is highly recommended.

Dr. Farhana Sheikh is a Principal Engineer and Manager at Intel Corporation, in Intel Government Technologies. She was elevated to IEEE Fellow in January 2026 for her contributions to 2D/3D heterogeneous integration and digital signal processing. Prior to September 2025, she was co-leading Altera’s Technology Pathfinding organization. She has over 20 years of experience in ASIC and DSP/communications research relating to adaptive DSP, cryptography, graphics, quantum wireless control, and 5G+ wireless. Farhana’s research focuses on 2-D and 3-D heterogeneous integration, including chiplet integration research, with an emphasis on die-to-die interfaces and 3D heterogeneous integration for next-generation wireless/sensing applications. Prior to joining Intel PSG/Altera, Farhana spent over 10 years as part of Intel Labs, leading multiple research programs in the area of adaptive DSP, intelligent computing, quantum computing, control circuits, and advanced wireless circuits and systems. Farhana has published over 50 papers, filed over 22 patents, and initiated the AIB-3D open-source specification for 3D chiplet heterogeneous integration, which was later used as the basis for the UCIe-3D PHY standard published in August 2024. Outside of Intel, she volunteers for IEEE Solid-State Circuits Society (SSCS), where she is the Vice President of Membership and wasChair/Co-Chair of IEEE SSCS Women in Circuits from 2022 – 2025. Farhana is a co-recipient of the 2020, 2019, and 2012 IEEE ISSCC Outstanding Paper Awards, and the 2023 CICC Best Paper Award. In 2021, Farhana was recognized for her mentorship work with students and faculty by the Semiconductor Research Corporation (SRC), which awarded her the 2021 Mahboob Khan Outstanding Industry Liaison Award. She was an IEEE SSCS Member-at-Large for 2022-2024 and an IEEE SSCS Distinguished Lecturer for 2023-2024. She is presently a distinguished lecturer for IEEE Women in Engineering. Farhana completed her M.Sc. and Ph.D. at the University of California, Berkeley in 1996 and 2008, respectively.

Dr. Yue Liang is a Distinguished Engineer of Advanced Technology Group at NVIDIA Corporation. Throughout her career, she has held a range of leadership roles in the semiconductor industry. Dr. Liang is currently responsible for silicon technology development and foundry management, including semiconductor processes, devices, reliability, design methodologies, and test-chip and technology-driver product bring-up. Prior to Nvidia, she was at the IBM Semiconductor R&D center. Dr. Liang has been an active committee member of the IEEE Symposium on VLSI Technology and Circuits since 2017. She holds over 25 issued patents, has authored numerous journal papers, and delivered multiple invited talks at international conferences. Dr. Liang received her Ph.D. and M.S. degrees from Stanford University and her B.S. degree from Tsinghua University.

This event requires a ticket for admission.

SSCS Young Professionals Mentoring and Networking Event
(Lehua Suite)

The SSCS Young Professionals Mentoring and Networking Event is a great place to meet new people and get advice from leading industry experts and professors. If you are interested in getting mentoring advice, or if you are a more senior engineer willing to give advice, this is a great place to start! This event is open to all conference attendees, where you can ask questions in a relaxed atmosphere. Refreshments and light snacks will be included at this event.

Applied Materials Panel Discussion during VLSI 2026
(Coral 4-5)

Applied Materials will host its inaugural panel discussion during VLSI, taking place on Tuesday, June 16, 2026, at the Hilton Hawaiian Village in Honolulu. This panel will convene leaders across the ecosystem to explore this year’s theme, “What Limits Compute and What Breaks Those Limits.” As AI workloads rapidly diversify, the discussion will examine the emerging physical, architectural, and manufacturing constraints on compute and storage—and how system architectures, logic and memory technologies, advanced packaging, and co‑optimized manufacturing must evolve to unlock the next wave of AI‑driven compute.

IEEE SSCS Distinguished Lecturer Preview
(Kahili Suite)

Join IEEE SSCS YP and the IEEE Hawaii Jt. SSCS/EDS Chapter for an evening with members of the SSCS Distinguished Lecturer roster. The program will include three condensed talks from select SSCS Distinguished Lecturers. Don’t miss this chance to see widely recognized experts in our field present their knowledge and experiences through high quality and highly polished presentations. Consider requesting an SSCS DL for your local chapter. See the Distinguished Lecturer Program page on the SSCS website for more information.