Recipient: Ritaro Takenaka
Paper Title: An 11.9-ENOB 560-MS/s Subranging ADC Employing Amplifier-Switching Architecture with Multi-Threshold Comparators
Authors: Ritaro Takenaka and Tetsuya Iizuka
Affiliation: The University of Tokyo, Tokyo, Japan
Posted by Melissa Sanders & filed under Circuits Papers.
Recipient: Ritaro Takenaka
Paper Title: An 11.9-ENOB 560-MS/s Subranging ADC Employing Amplifier-Switching Architecture with Multi-Threshold Comparators
Authors: Ritaro Takenaka and Tetsuya Iizuka
Affiliation: The University of Tokyo, Tokyo, Japan
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