2024 IEEE Symposium on VLSI Technology & Circuits
2024 IEEE Symposium on VLSI Technology & Circuits
  • About
  • Program
  • Registration
    • Registration
    • Hotel Reservations
    • Onsite Information
    • VLSI OnDemand
  • Authors
    • Call for Papers
    • Call for Workshops
  • Media
  • Demo Sessions
  • Archive

Nishant Patil and Albert Lin

Posted December 1, 2021 by vlsidev_qn81ur & filed under Technology Papers.

Recipient: Nishant Patil and Albert Lin

Paper: Integrated Wafer-Scale Growth and Transfer of Directional Carbon Nanotubes and Misaligned-Carbon-Nanotube-Immune Logic Structures

Authors: Nishant Patil, Albert Lin, Edward R. Myers, H.-S. Philip Wong, and Subhasish Mitra
Affiliation: Stanford University

CONTACT INFO

VLSI Secretariat
North America and Europe

VLSI Secretariat
Japan and Far East

CONFERENCE POLICIES

Notifications & Policies

Accessibility

Non-discrimination Policy

IEEE Ethics Reporting

IEEE Privacy Policy

Terms

FAST LINKS

Call for Papers

Call for Workshops

Register

Media

Symposium Archive

Sign up to receive
important notifications

© 2023 Copyright IEEE. All rights reserved. A not-for-profit organization, IEEE is the world’s largest technical professional organization dedicated to advancing technology for the benefit of humanity.