2026 IEEE/JSAP Symposium on VLSI Technology & Circuits
2026 IEEE/JSAP Symposium on VLSI Technology & Circuits
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Dajiang Zhou

Posted December 1, 2021 by vlsidev_qn81ur & filed under Circuits Papers.

Recipient: Dajiang Zhou

Paper: A 530Mpixels/s 4096×2160@60fps H.264/AVC High Profile Video Decoder Chip

Authors: Dajiang Zhou1, Jinjia Zhou1, Xun He1, Ji Kong2, Jiayi Zhu2, Peilin Liu2, and Satoshi Goto1

Affiliation: 1Waseda University, Japan & 2Shanghai Jiao Tong University, China

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