2026 IEEE/JSAP Symposium on VLSI Technology & Circuits
2026 IEEE/JSAP Symposium on VLSI Technology & Circuits
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Jason Hu

Posted December 1, 2021 by vlsidev_qn81ur & filed under Circuits Papers.

Recipient: Jason Hu

Paper: A 9.4-bit, 50-MS/s, 1.44-mW Pipelined ADC using Dynamic Residue Amplification

Authors: Jason Hu, Noam Dolev and Boris Murmann

Affiliation: Stanford University, USA

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