2026 IEEE/JSAP Symposium on VLSI Technology & Circuits
2026 IEEE/JSAP Symposium on VLSI Technology & Circuits
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Cimang Lu

Posted December 1, 2021 by vlsidev_qn81ur & filed under Technology Papers.

Recipient: Cimang Lu

Paper:Design and Demonstration of Reliability-Aware Ge Gate Stacks with 0.5 nm EOT

Authors: Cimang Lu, Choong Hyun Lee, Tomonori Nishimura and Akira Toriumi

Affiliation:The University of Tokyo, JST-CREST

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