Workshop 11
Revolutionizing Electronics with GaN: Opportunities and Challenges
Organizer :Navneet Jain (Globalfoundries, Inc Santa Clara) The workshop highlights advancements in GaN technology across various applications. It explores RF GaN-on-Si for 5G/6G connectivity, emphasizing its journey from research to commercialization. Discussions cover GaN power devices, with innovations in low- and high-voltage ranges enabling breakthroughs in AI, energy, and industrial applications. High-temperature GaN HEMTs are showcased for use in aerospace, energy harvesting, and extreme environments. Vertical GaN devices are presented as promising solutions for high-voltage power systems, overcoming limitations of lateral devices. The integration of lateral GaN technology is examined, focusing on its benefits and challenges. Breakthroughs in GaN complementary circuits address critical issues in high-frequency power electronics.
Navneet Jain is a Distinguished Member Technical Staff at GlobalFoundries, Inc, Santa Clara, since 2009. He holds a PhD and MTech in EE form IIT Delhi, India and BE(Hons) in EEE from BITS Pilani, India. He has over 25 years of experience in the field of circuit/logic design, optimization and methodologies for timing closures for microprocessor and graphics chip design at SGI, Transmeta, AMD, SGI, Software &Technologies (Duet) and Center for Applied Research in Electronics (CARE) at IIT Delhi. At GlobalFoundries he has architected and productized standard cells libraries in 22FDX, 12LPP, 45SPCLO, RF SOI, Bulk CMOS, and SiGe including several test chips for FAB silicon validations with emphasis on developing ultra-lower and low leakage design. Navneet has over 20 patents and 10 publications in IEEE transactions and international conferences. He is designated as Master Inventor and also recipient of the CEO award at GlobalFoundries.
To meet the growing demand for wireless connectivity in the 5G/6G era, high-performance, cost-effective technologies are needed to complement CMOS-based RF front-end modules. RF GaN-on-Si technology, developed through over two decades of research, has emerged as a promising solution.
GaN power devices have been commercialized in voltage classes between 30 V and 900 V and deployed in numerous applications such as consumer electronics, data centers, and industrial manufacturing. Recently, there have been growing research efforts in academia and industry on developing GaN devices at either high voltage (1000-10000 V) or low voltage (5-30 V) to compete with SiC and Si in their traditional territories. By employing innovative device architectures such as multi-dimensional structures, the best performance of experimental GaN devices has exceeded the theoretical limits of Si and SiC from 5 V to 10000 V. This talk will present these innovative GaN power devices beyond the commercially available voltage ranges and discuss their potential for expanding GaN into new applications including power management for AI processors, motor drives, renewable energy, and grid.
Traditional room-temperature electronics based on silicon have transformed the world over the past 70+ years. However, many applications are limited by the temperature performance of silicon devices (＜250°C). High-temperature (HT) electronics, though produced in lower volumes, are an increasingly growing field with critical applications in energy harvesting (deep gas/oil drilling, geothermal), chemical sensing (automotive exhaust, nuclear/chemical power plants), space exploration (Venus rovers), aerospace (hypersonic aircraft, jet engines), and more. The inability of electronics to operate above 250°C remains a crucial limitation for these fields.
The rapid advancements in artificial intelligence and the accelerating electrification of modern systems are driving the growing demand for efficient power electronics. While lateral GaN devices are widely used in RF amplifiers and low-voltage power electronics, they encounter significant limitations in high-voltage, high-current power applications. In contrast, vertical GaN devices demonstrate superior potential in these domains, providing more uniform current flow, homogeneous electric field distribution, and improved thermal management. Although not yet commercially available, vertical GaN devices hold great promise in competing with incumbent SiC and Si power transistors.
Lateral widegap power devices in gallium nitride (GaN) technology are now widely used as power switches, where their superior figures of merit compared to silicon counterparts enable compact and energy-efficient greener solutions. The lateral nature of the GaN platform opens new opportunities such as addition of valuable functionalities, enhancement of performance, and safety of the power devices. However, GaN technology is still in the developing phase, and there are multiple challenges in integration including lack of complementary devices and wide process- and temperature-variations in the device characteristics. This talk aims to present some of the benefits of integration in power devices and the challenges and opportunities on the frontier of integration in GaN.
A report from Oak Ridge National Lab forecasts that by 2030, 80% of the power generated in the U.S. will pass through power electronics circuits. This surge is driven by growing demand from data centers, cloud computing, electric vehicles, and the Internet of Things. In these circuits, the size of passive components like inductors and capacitors?key factors in power density and form-factor?depends heavily on operating frequency. By increasing the switching speed, the energy storage needs of these components can be minimized, allowing for smaller designs.
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The first part of the talk will highlight the academic research on RF GaN-on-Si HEMTs, particularly the contributions of Nanyang Technological University (NTU) since 2005. Topics include RF power amplification beyond 100 GHz, noise, linearity, and FinFET transistor architectures. NTU’s efforts have also focused on advancing GaN-on-Si HEMT technology towards commercialization, exploring CMOS compatibility and developing 200 mm GaN-on-Si and GaN-on-insulator (GaNOI) technologies.
The second part will discuss the role of research institutes in bridging the gap between lab and fab. A case study of the National GaN Technology Centre (NGTC) in Singapore, launched in 2023 with an initial USD 85M investment, will be presented. This center supports industry-driven R&D and provides rapid tape-out services for 8” GaN-on-Si CMOS-compatible processes and 6” GaN-on-SiC processes. The talk will conclude with key opportunities and challenges in transitioning RF GaN-on-Si technology from research to industry.
Gallium Nitride (GaN) high electron mobility transistors (HEMTs) are ideal for HT electronics due to their low intrinsic carrier concentration and excellent high-temperature electrical properties. This tutorial will cover: 1) key high-temperature applications; 2) why GaN is well-positioned to address these markets from both a material/device and economic perspective; and 3) recent advancements in GaN devices and circuits toward robust, high-performance, high-temperature systems.
This presentation will offer a comprehensive exploration of the common architectures and state-of-the-art advancements in vertical GaN power transistors, with an emphasis on critical design considerations and recent progress. Additionally, we will examine essential performance metrics and measurement methodologies, address key challenges in the field, and outline promising directions for future research and innovation.
However, the operating frequency of today’s GaN transistors is usually constrained by the gate inductance between the gate electrode and the driver circuit. To address this, the GaN community has traditionally turned to direct-coupled logic (DCL) to integrate gate-driver circuits directly on the same chip as GaN power devices. Unfortunately, DCL technology comes with its own drawbacks: low efficiency and limited design flexibility.
What’s really needed is a complementary CMOS-like circuit technology?one that can boost efficiency, simplify designs, and provide better noise immunity and linearity. But achieving this has proven challenging due to the absence of high-performance GaN p-FETs and the difficulty of integrating them with E-mode n-FET devices.
This talk will delve into our work on developing a regrowth-free, high-performance GaN complementary circuit technology, and how it addresses these challenges head-on.