PLENARY & PANELS | Symposium on VLSI Technology and Circuits

Evening Panel Discussion 1

What is Scalable & Sustainable in the Next 25 Years? [Shunju I]

Organizers: M. Tada, NanoBridge Semiconductor, Inc.
Organizers: S-C. Song, Google

Date & Time: 8:00P.M.-9:30P.M. on June 13

Moderator:

T. Yamamoto, Tokyo Electron Ltd.: About Tomonari Yamamoto

Tomonari Yamamoto received the B.S., M.S., and Ph.D. degrees in electrical engineering from Keio University. From 1999 to 2008, he was with Fujitsu Ltd., Tokyo, Japan, where he worked on process integration and device design for advanced CMOS technologies. From 2008 to 2016, he was with Taiwan Semiconductor Manufacturing Company (TSMC), Ltd., Hsinchu, Taiwan, R.O.C., where he was the device/integration manager of the R&D platform technology team. He is currently with Tokyo Electron Ltd. (TEL), Tokyo, Japan, where he is currently the vice president of corporate innovation division to determine the corporate development strategy.

What is scalable & sustainable in the next 25 years?
Process node scaling have been successful for many decades with the evolutions in lithography, materials, and device structure, but how about in the next 25 years? How can we overcome the limits of scaling in (1) Physics (2) Manufacturability (3) Economy (4) Energy in chip operation (5) Energy in manufacturing (6) Greenhouse gas emissions in manufacturing and (7) Engineering resources. Can our industry continued to be attractive to grow further? Tomonari Yamamoto from TEL will moderate a panel of distinguished guests from across industry and R&D organization to offer their valuable insights and thoughts, and share their experience on this important and interesting topic.

Panelists:

A. Goda, Micron Memory Japan, K.K.: About Akira Goda

Akira Goda is a Fellow for NAND technology at Micron. He received B.S. and M.S. degrees in chemistry from the University of Tokyo in 1995 and 1997, respectively. In 2004, he joined Micron Technology, Boise, Idaho, U.S., where he led 2D and 3D NAND flash cell development. Since 2019, he has been leading the NAND pathfinding team from Tokyo, Japan. His technical expertise and interest are in 3D NAND flash technologies.
D. Greenlaw, Google: About David Greenlaw

David Greenlaw is VP Engineering at Google, leading the Silicon Technologies & NPI (New Product Introduction) team. His group has responsibility for the silicon and packaging technology roadmaps as well as testchips and the product bring-up through structural and functional testing. David has been working on advanced CMOS for more than 30 years and most enjoys complex debug activities between teams wearing different company badges while working in a language that is not everyone's first. He holds two master's degrees: in Physics from Univ Texas at Austin and in EE from Stanford University.
G. Yeap, TSMC: About Geoffrey Yeap

Dr. Geoffrey Yeap is currently working at TSMC as Vice President on the flagship N2 platform technology, and previously successfully defined, developed, and introduced N5 platform technology into HVM. Previously, Geoffrey was a Vice President of Engineering at Qualcomm Technologies Inc. in charge of silicon technology & foundry engineering. He has close to 30 years of semiconductor industry experience on advanced mobile and high-performance microprocessor technology, new technology/product introduction, as well as design/technology co-optimization. He has given keynotes and invited talks as well as serving in program committees of key semiconductor technology conferences, such as IEDM, VLSI, ISSCC etc. Geoffrey holds close to 100 US & international patents and has published more than 60 refereed journal/conference papers.
M. Chudzik, Applied Materials, Inc.: About Mike Chudzik

Dr. Chudzik is a Vice President of Technology at Applied Materials. He leads the Integrated Materials Solutions (IMS) team developing new, emerging technologies within the ICAPS (IoT, Communications, Automotive, Power and Sensors) and Packaging group. This includes managing teams of device integrators, process and device engineers and program managers to execute on large scale device fabrication projects.
Prior to Applied Materials, Mike was at IBM for 14 years where he led teams in the R&D of advanced semiconductor process integration. He received his Ph.D. in electrical engineering at Northwestern University.
M. Na, SK Hynix Inc.: About Myung Hee Na

Dr. Myung Hee Na is the Vice President of Research Division at SK Hynix. Having recently joined at SK Hynix, she is responsible for leading next-generation memory technology research. Prior to joining Sk Hynix, she was the Vice President of Technology Solutions and Enablement at imec where she was responsible for CMOS technology research for advanced CMOS and AI technology. After completing her Ph.D in Physics, Dr. Na started her career at IBM in 2001, where she held various technical, managerial and executive roles until early 2019. During that time, she was promoted to Distinguished Engineer and Technical Executive. At IBM Research, she successfully led Research and Development for multiple generations of semiconductor technologies, including high-K metal gate, FinFET, and Nanosheet development. She received several Outstanding Technical Achievement Awards for her technical contributions. Moreover, she has co-authored numerous research papers and holds several U.S. and international patents.
S. Samavedam, imec: About Sri Samavedam

Sri Samavedam is SVP of CMOS Technologies at imec, leading research programs in Logic, Memory, Photonics and 3D System Integration. Prior to that, he was Senior Director of Technology Development at Globalfoundries in Malta, NY, where he led qualification of 14nm FinFET technology and derivatives into volume production and development of 7nm CMOS technology. He began his career at Motorola in Austin, TX. He has over 100 publications, over 50 US patents and is a Senior Member of IEEE. He has a Ph.D. in Materials Science and Engineering from MIT, Masters from Purdue University and bachelors degree from IIT, Madras, India.

Evening Panel Discussion 2

Can Universities Help to Revitalize the IC Design Industry? If So, How? [Suzaku I]

Organizers: T. Nezuka, MIRISE Technologies Corp.
Organizers: S. Ho, MediaTek Inc.

Date & Time: 8:00P.M.-9:30P.M. on June 13

Moderator:

A. Abidi, Univ. of California, Los Angeles: About Asad Abidi

The moderator, Asad Abidi, is Professor of Electrical and Computer Engineering at the University of California, Los Angeles. He has been teaching and researching analog and RF IC design since the early 1980s. He has also been involved with the Symposium on VLSI Circuits since its inception.

Panelists:

A. Matsuzawa, Tokyo Institute of Technology / Tech Idea: About Akira Matsuzawa

Akira Matsuzawa received B.S., M.S., and Ph.D. degrees in EE from Tohoku University, Sendai, Japan, in 1976, 1978, and 1997. In 1978, he joined Panasonic, in 2003, joined Tokyo Tech as a full professor, and in 2018, became professor emeritus and CEO of Tech Idea. He has been developing video-rate ADCs, mixed-signal SoCs and millimeter-wave CMOS transceivers. In 2022, he received IEEE Donald. O. Pederson award. He is an IEEE Fellow since 2002.
D. Friedman, IBM: About Daniel Friedman

Daniel Friedman is currently a Distinguished Research Scientist and Senior Manager of the Communication Circuits and Systems department at the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA; he is also an IEEE Fellow. He received his doctorate from Harvard University and then subsequently completed post-doctoral work at Harvard and consulting work at MIT Lincoln Laboratory. At IBM, he initially developed field-powered RFID tags before turning to high data rate wireline and wireless communication. His current research interests include high-speed I/O design, phase-locked-loop (PLL) design, millimeter-wave (mmWave) circuits and systems, accelerator designs, and circuit/system approaches to enabling new computing paradigms. He holds more than 90 patents and has authored or coauthored more than 75 publications. He has served on the technical program committees of BCTM and ISSCC; he currently serves as the ISSCC Short Course chair, as an Associate Editor of the JSSC, and as the IEEE SSCS Vice President of Membership.
Kenneth K. O, Univ. of Texas at Dallas: About Kenneth O

Kenneth O received his S.B, S.M, and Ph.D. degrees in Electrical Engineering and Computer Sci¬ence from the Massachusetts Institute of Technology, Cambridge, MA in 1984, 1984, and 1989, respectively. From 1989 to 1994, Dr. O worked at Analog Devices Inc. developing sub-micron CMOS processes for mixed signal applications, and high speed bipolar and BiCMOS processes. He was a professor at the University of Florida, Gainesville from 1994 to 2009. He is currently the Director of Texas Analog Center of Excellence and Texas Instruments Distinguished University Chair Professor of Analog Circuits and Systems at the University of Texas at Dallas. His research group is developing circuits and components required to implement analog and digital systems operating at frequencies up to 40THz using silicon IC technologies. Dr. O was the President of the IEEE Solid-State Circuits Society in 2020 and 2021. He has authored and co-authored 290 journal and conference publications, as well as holding 15 patents. Dr. O has received the 2014 Semiconductor Research Association University Researcher Award. Prof. O is also an IEEE Fellow.
M. Choi, Samsung Electronics Co., Ltd.: About Michael Choi

Michael Choi received the master’s and Ph.D. degrees from the University of California, Los Angeles, CA, USA, in 1998 and 2002, respectively. He joined Samsung Electronics, Hwaseong, South Korea, in 2006, where he is a Master (VP of Technology). His expertise includes high-speed data converters, temperature sensors, and various analog front-ends for UHD digital TV, WiFi & 5G connectivity, automotive V2X, touch controller, and CMOS image sensor.
M. Shulaker, MIT / ADI: About Max Shulaker

Max Shulaker is affiliated with both academia (MIT, where he leads the Novel Electronic Systems Group, NOVELS), and industry (ADI). His passion lies in transforming fundamental scientific advances into working systems that promise to impact and improve our daily lives. His research focuses on the broad area of nanosystems: understanding and optimizing multidisciplinary interactions across the entire stack. Key breakthroughs from his group range from novel nanomaterial fabrication processes and circuit designs for emerging nanotechnologies, up to new system architectures. Through their unique approach, Shulaker and his students have demonstrated some of the most advanced beyond-silicon electronic systems realized to-date, with applications ranging from next-generation computing systems that promise orders of magnitude gains in efficiency to improving healthcare by enabling rapid diagnosis of infectious diseases. Shulaker’s recognitions and honors include multiple fellowships (such as the Hertz Fellowship and Moore Inventor Fellowship), several young faculty and young career awards, and numerous award-winning publications at major journals and venues.
M-F. Chang, TSMC / NTHU: About Meng-Fan Chang

He is a Director at the Corporate Research of TSMC and a Distinguished Professor at National Tsing Hua University, Taiwan. Dr. Chang has worked in industry for more than 13 years and academic for 13+ years. He has served as sub-committee chairs of several top semiconductor conferences, such as IEDM, ISSCC and DAC. His research interests include circuit designs for memory, circuit-device interaction, compute-in-memory and software-hardware co-design for AI chips. He is a top-10 paper contributor of ISSCC (the first 70 years). He is an IEEE Fellow.