2013 VLSI Technology Short Course Program
"Technology Enablers for the Future Smart Society"
Monday, June 10, 2013
- M. Hane, Renesas Electronics Corporation
G. Yeap, Qualcomm Inc.
- Shunju I, II
To give attendees an opportunity to learn about the latest advances in semiconductor devices and memory technologies and their implications for VLSI circuit design, we plan to hold a one day Short Course, “Technology enablers for the Future Smart Society” .
A word “Smart” is exemplary of how our future society will be progressive with vast kinds of technological features, such as fast-logic computing, energy-saving, versatile connectivity, real-time information sharing, and various mobile-gears for network/cloud computing, supported by various technological elements of advanced logic and memory devices, efficient system chips, high-density packaging, and their fabrication methods, which will address topics of interest to both Technology and Circuits attendees.
This short course picked up six prominent topics beginning with a presentation features recently launched Intel’s trigate technology and future CMOS device scaling prospect. The second topic deals with chip-packaging for the future smart gears of high-performance, cost-effective compact dimension. Super fine patterning technologies will be lectured in the third presentation. Then, CMOS image sensor will be discussed with both device and circuit technology advancements. The fifth contribution of this course appears as zero-standby logic realization perspective based on MTJ technology. The courses will finish with a review of advanced memory technology with emphasis on basic principles of several memory cell operations providing high-speed low-power solution challenges and opportunities for our industry.
These lecture courses are given by industry and academic leaders in their respective fields and present a great opportunity to meet with them and learn about these areas that have a huge impact on our industry.
|8:10 - 8:15
|8:15 - 9:25
||Advanced CMOS Device Technology
Ian R. Post, Intel
|9:25 - 10.35
||Advanced Chip-Packaging/Integration Technology “From VLSI to WLSI, an Introduction to 3D System Integration”
Chih Hang TUNG, TSMC
|10:35 - 10:50
|10:50 - 12:00
||Advanced Lithography Patterning Technologies
Alek Chen, ASML
|12:00 - 13:30
|13:30 - 14:40
||Advanced CMOS Image Sensors
Yoshitaka Egawa, Toshiba
|14:40 - 14:55
|14:55 - 16:05
||Spintronics Based NV-Memory/Logic for High Performance & Low Power Systems
Tetsuo Endo, Tohoku University
|16:05 - 17:15
||Next Generation Memory Technology
Koji Sakui, Micron